June 2025

Design Verification using SystemVerilog Duration: 4 WeeksProject Training – Offline / Online Program Summary: Covers System Verilog concepts and verification methodologies. Includes testbench architecture, assertions, and coverage. Hands-on labs from RTL to complete testbenches. Introduces UVM and functional verification strategies. Final project on protocol/interface verification using SV Program Outcomes: Write synthesizable System Verilog and testbenches. Apply constrained randomization and assertions (SVA). Measure and analyze functional coverage. Design modular verification environments (with drivers/monitors). Execute and debug real-world verification projects Project stream: Protocol Verification: UART, SPI, I²C, and AXI4 interface validation using SystemVerilog testbenches. IP Core Verification: ALU, FIFO, Memory Controller, and CRC checker functional verification. FSM-Based Projects: Verification of Traffic Light, Vending Machine, and Elevator control FSMs Platforms/Tools: EDA Playground/ Questasim Xilinx Vivado Days 1–15: SystemVerilog for Functional Verification Day Topics Lab Activities / Outcome Day 1 Recap of Verilog & RTL Design Flow RTL modules: counter, mux Day 2 Introduction to SystemVerilog Data types, logic, arrays, typedef Day 3 Procedural Blocks in SV always_comb, always_ff, initial, tasks Day 4 Interfaces and Modports Create interface for DUT communication Day 5 SystemVerilog Testbenches Basic testbench structure Day 6 Constrained Randomization rand, randc, constraint blocks Day 7 Assertion-Based Verification (SVA) Immediate & concurrent assertions Day 8 Functional Coverage Coverpoints, covergroups, bins Day 9 Classes & OOP in SV Class hierarchy, inheritance Day 10 Transaction-Level Modeling Create transaction objects Day 11 Building a Driver & Monitor Connecting testbench to DUT Day 12 Scoreboard & Checker Concepts Self-checking testbenches Day 13 Introduction to UVM UVM environment overview Day 14 Verification Plan & Strategy Develop plan for test cases Day 15 Integration Practice Build complete testbench for UART Days 16–20: Project Work (Functional Verification of a Design) Day 16 Test Plan & Environment Setup Write verification plan, build interface Day 17 Transaction, Driver, Monitor Code and connect testbench Day 18 Assertions & Coverage Integration Add SVA + functional coverage Day 19 Debugging & Simulation Run tests, observe coverage, fix bugs Day 20 Final Report & Demo Present design + verification metrics Enquire Now Download Brochure Training Calendar Recent Placements

IoT-Enabled Embedded Systems Duration: 4 WeeksProject Training – Offline / Online Program Summary: Introduce IoT architecture, microcontroller selection, and MicroPython programming basics. Integrate digital and analog sensors with ESP32 using GPIO, ADC, and interrupt handling. Control actuators and interface input/output devices like keypads and displays. Enable wireless communication and cloud integration using Wi-Fi, ThingSpeak, Blynk, and MQTT. Guide learners through building and presenting a complete mini IoT system during a capstone project. Program Outcomes: Understand and implement end-to-end IoT system architecture using ESP32. Interface sensors, actuators, and user interfaces using MicroPython. Connect IoT devices to Wi-Fi and integrate with cloud platforms for data monitoring. Implement MQTT-based publish/subscribe communication with a public broker. Design, test, and demonstrate a working IoT application with mobile app/cloud interaction. Project stream: Smart Irrigation System (Soil sensor + pump + cloud dashboard) IoT Home Security (IR + PIR + Buzzer + Telegram alert) Health Monitor (Temperature + Pulse sensor + mobile dashboard) Smart Waste Bin (Ultrasonic + Firebase + alert system) Energy Monitor (Voltage sensor + live tracking + alerts) Platforms/Tools: Hardware Platform: ESP32 Development Board Programming Language: MicroPython Software Tools: Thonny IDE Cloud Platforms: ThingSpeak, Blynk, Adafruit MQTT Broker Peripherals: DHT11, PIR, Ultrasonic, Soil Moisture Sensor, LDR, Keypad, OLED/LCD, Motors, RTC Module Days 1–15: Core Concepts & Hands-On Labs Day Topics Lab Activities / Outcome Day 1 Overview of IoT & Embedded Systems IoT architecture, MCU selection Day 2 Introduction to MicroPython GPIO control – LED/switch Day 3 Digital Sensors Integration IR, Ultrasonic, PIR Day 4 Analog Sensors Integration DHT-11, Soil Moisture, LDR Day 5 Actuators Integration Servo Motor, DC Motor Day 6 Input Device Integration Hex Keypad Day 7 Display units LCD, OLED Day 8 Wi-Fi Connectivity (ESP32) Connect to Wi-Fi, test with local server Day 9 Cloud Platforms Overview ThingSpeak/Blynk Day 10 ThingSpeak Integration Live sensor data logging and charting Day 11 Mobile App Interface (Blynk) App control of device (LED/Relay) Day 12 MQTT Protocol & Broker Setup Publish – adafruit.com Day 13 MQTT Protocol & Broker Setup Subscribe – adafruit.com Day 14 Real-Time Clock & Power Management RTC module, deep sleep in ESP32 Day 15 System Integration Complete IoT chain: Sensor → MCU → Cloud/App Days 16–20: Capstone Project (Mini IoT System) Day 16 Project Design & Planning Architecture, block diagram Day 17 Hardware Setup Interface all modules Day 18 Software + Cloud Integration Develop code + link with cloud/app Day 19 Testing & Debugging Run scenarios, validate edge cases Day 20 Final Demo + Certificate Live presentation, source code submission Enquire Now Download Brochure Training Calendar Recent Placements

Deep Learning Architect Internship Duration: 4 WeeksProject Training – Offline / Online Program Summary: Covers Python, data analysis, machine learning, and deep learning concepts. Hands-on labs using tools like Pandas, Scikit-learn, and TensorFlow/Keras. Focus on real-world problem-solving and end-to-end ML/DL workflows. Includes capstone projects such as image classification and sentiment analysis. Emphasizes practical skills, model tuning, and final project presentation. Program Outcomes: Gains a solid understanding of core data analysis, machine learning, and deep learning principles. Build practical skills using Python, Pandas, Scikit-learn, TensorFlow/Keras, and Jupyter Notebook. End-to-End Project Development Skills to handle real-world datasets, build and evaluate models, and deliver complete ML/DL projects. Portfolio-Ready Capstone Projects complete and present impactful projects Project stream: Apply machine learning algorithms like SVM, Random Forest, and K-Means to real-world datasets. Implement complete ML pipelines: preprocessing, modeling, and evaluation. Focus on feature CNN,ANN,GRU, Deploy final models using Streamlit and version control with GitHub. Platform: Python 3.x, NumPy, Pandas, Matplotlib, Seaborn, Scikit-learn Jupyter Notebook, VS Code, Google Colab Days 1–15: Theory + Simulation Labs Day Topic Details Day 1 Python for AI/ML NumPy, Lists, Functions, Loops Day 2 Introduction to DAV (Data Analysis & Visualization) Load data, describe, visualize using matplotlib & seaborn Day 3 Pandas for Data Analysis Series, DataFrames, slicing, filtering Day 4 Data Cleaning & Preprocessing Missing values, outliers, encoding, scaling Day 5 Exploratory Data Analysis (EDA) Correlations, pairplots, histograms, boxplots Day 6 Feature Engineering & Selection Feature extraction, PCA, multicollinearity Day 7 Intro to Machine Learning Supervised vs Unsupervised, use cases Day 8 Regression Models Linear, polynomial regression + RMSE, R² Day 9 Classification Algorithms Logistic Regression, KNN, Decision Trees Day 10 Model Evaluation & Tuning Confusion matrix, accuracy, precision, recall Day 11 Introduction to Neural Networks Perceptron, activation functions, loss Day 12 Deep Learning with TensorFlow/Keras Building a simple NN using Keras Sequential Day 13 Convolutional Neural Networks (CNNs) Image classification (MNIST or CIFAR-10) Day 14 Recurrent Neural Networks (RNNs) & LSTMs Time series, text prediction Day 15 Regularization & Model Optimization Dropout, EarlyStopping, Model saving/loading Days 16–20: Final ML Project Day 16 Problem Definition & Dataset Selection Finalize dataset, define project scope Day 17 Data Preprocessing & EDA Clean, visualize and prepare the dataset Day 18 Model Building Train ML/DL model, tune hyperparameters Day 19 Testing & Evaluation Metrics, confusion matrix, plots Day 20 Final Demo & Report Submission Present project, submit code & documentation End to End Projects Image Classifier, Home Energy Consumption Forecasting, Object Detection Enquire Now Download Brochure Training Calendar Recent Placements

Build Advanced Embedded Systems using ARM Cortex-M3 Duration: 4 WeeksProject Training – Offline / Online Program Summary: Introduces ARM Cortex-M3 architecture and toolchain setup. Covers core exception handling and interrupt mechanisms. Provides hands-on with GPIO, ADC, Timers, PWM, and communication protocols. Demonstrates interfacing with peripherals like LCD, Keypad, Motors, and EEPROM. Includes practical experiments using UART, SPI, I2C, and RTC modules. Program Outcomes: Understand ARM Cortex-M3 architecture and exception vector table. Configure GPIOs and interface external devices like LCD and keypads. Generate delays, handle interrupts, and use ADC for analog signal reading. Implement real-time applications using timers, RTC, and PWM. Design embedded communication systems using UART, SPI, and I2C protocols Project stream: User Interface & Display: LCD + Hex Keypad Code Entry System, Digital Clock with RTC and Alarm Feature Sensor & Data Acquisition: Temperature Monitoring System (ADC + RTC), Analog Voltage Display using Potentiometer Motor & Actuator Control: DC Motor Speed Controller using PWM, Smart Fan Controller (Temp + PWM) Communication Interfaces: UART-Based Inter-Board Data Transfer, SPI-Controlled 7-Segment Display System Memory & Storage: EEPROM Read/Write via I²C, Data Logger using I²C EEPROM and RTC Platforms/Tools: Keil µVision Flash Magic Days 1–15: Advanced Cortex-M3 Concepts + Hands-On Labs Day Topics Lab Activities / Outcome Day 1 ARM Cortex-M3 Overview Block diagram, toolchain setup Day 2 Cortex-M3 Exception & Vector Table Reset, NMI, HardFault handling Day 3 GPIO Different patterns execution Day 4 LCD with Hex Keypad Row Scan, Column Scan & Keypad Day 5 ADC -1 Potentiometer Day 6 ADC -2 Temperature Sensor Day 7 Timers Delay generation Day 8 NVIC-1 Internal interrupts Day 9 NVIC-2 External interrupts Day 10 PWM & Motor Control PWM generation for motor speed Day 11 RTC + Alarm Real-Time Clock with alarm interrupt Day 12 PLL CPU operation with different frequencies Day 13 UART protocol Serial communication with Inter-board transfer Day 14 SPI Protocol Interfacing with 7-segment Display Day 15 I2C Protocol EEPROM communication Days 16–20: Final Project (Real-Time Embedded System) Day Stage Activities Day 16 Project Kickoff Design architecture, select modules Day 17 Module Coding & Testing Peripheral code integration Day 18 Application Logic Develop core functionality Day 19 Debugging & Integration Test full application, edge cases Day 20 Final Presentation & Report Demo working system, explain flow Enquire Now Download Brochure Training Calendar Recent Placements

Advanced RTL Designs with Protocols Duration: 4 WeeksProject Training – Offline / Online Program Summary: Introduction to VLSI design flow and Verilog HDL fundamentals. Hands-on learning of gate-level, dataflow, and behavioral modeling. Design of combinational and sequential digital circuits using Verilog. Implementation of UART, SPI, I²C, and AXI communication protocols. System-level integration of multiple RTL modules. Project development and student presentations. Program Outcomes: Model digital systems using Verilog across various abstraction levels Simulate and debug designs using professional EDA tools Design synthesizable communication protocol modules Integrate functional blocks into complete digital systems Demonstrate and present working RTL-based projects. Project stream: ALU & Code Converters (Digital system design) FSM-Based Controllers (Traffic light, vending machine, password lock) Sequential Logic Projects (Counters, shift registers, clock dividers) Protocol Implementations (UART, SPI, I2C, AXI4) System Integration Projects (Memory interface, CRC checker, mini SoC Platform: XILINX VIVADO Questasim / EDA Playground Days 1–15: Theory + Simulation Labs Day Topics Hands-on Activities Day 1 Introduction to Digital Design & RTL Review of combinational & sequential logic Day 2 Verilog HDL Basics Verilog syntax, modules, testbenches Day 3 RTL Design Methodology Design abstraction levels, FSM design Day 4 Combinational Logic Design ALU, MUX, Encoder, Decoder in Verilog Day 5 Sequential Logic Design Flip-flops, Counters, Registers Day 6 FSM-Based Design Mealy/Moore Machines, vending machine Day 7 Synthesis & Simulation Tools Using ModelSim / Vivado / Synplify Day 8 Advanced Verilog Constructs Generate, define, parameterized modules Day 9 Bus Protocols Overview Introduction to AMBA, I2C, SPI, UART Day 10 UART Protocol Deep Dive UART Transmitter/Receiver RTL design Day 11 SPI Protocol Deep Dive SPI Master/Slave RTL design Day 12 I2C Protocol Deep Dive Bit-banging I2C Master design Day 13 AMBA AHB Protocol Basic AHB-lite Day 14 APB Protocol APB read-write models Day 15 AXI Protocol AXI-Lite Days 16–20: Final RTL Project Day 16 Project Kickoff Requirement analysis, RTL block diagram Day 17 RTL Coding Module-level implementation Day 18 Functional Simulation Testbench creation & waveform analysis Day 19 Synthesis & Reporting Timing, area reports Day 20 Final Demo & Report Submission Simulation demo, oral presentation, feedback Enquire Now Download Brochure Training Calendar Recent Placements