Advanced Diploma Program in VLSI Design &Verification
Durations – 300 Hrs.
Core Engineering
Digital Hardware Familarization
- Digital Electronics,Logical circuit design
- Timing Analysis
Core Programming Fundaments
- Mastring OOP using C++
- Linux Basic Commands
VLSI Design RTL Coding and Verilog
- Digital circuit design with different modeling styles
Specializations :
Design and Verification using System Verilog
- OOPs in System Verilog
- Randomization & Constraints
- Functional Coverage
- Test bench development
Expermential Project Based Learning
- Students LEarn through hands-on projects b y designing,implementing and testing real digital systems.
Technology Platforms
- Xilinix Vivado : For synteesis, implementation and FPGA programming
- QuestaSim / EDA Playground : For simulation and verification of RTL & SystemVerilog
- Atrix-7 FOGA / Zynq SoC : For real-time hardware depolyment and validation
Industry Job Roles
- VLSI Design Engineer
- RTL Design Engineer
- FPGA Engineer
- ASIC Design Engineer
- Verification Engineer (SystemVerilog / DV)
- Graduate Engineer Trainer (VLSI / Embedded)
