FPGA Design and Verification
Project Internship Program
Duration – 5 / 15 Weeks
Training – Offline – 4 WEEKS
Research 7 Project Guidance Online – 1/8 /11 Weeks
Training – Offline – 4 WEEKS
Research 7 Project Guidance Online – 1/8 /11 Weeks
PROGRAM HIGHLIGHTS:
- Comprehensive knowledge of FPGA design and verification
- Mastery of simulation-based, coverage-driven, and formal verification.
- Hands-on experience with FPGA tools like Vivado, Quartus, and Model Sim.
- Expertise in debugging and optimizing FPGA designs
Programs Outcomes:
- Design and simulate FPGA systems using Verilog, VHDL, and System Verilog.
- Implement advanced verification techniques (System Verilog, UVM)
- Perform in-system FPGA debugging using JTAG and logic analysers
- Manage and optimize FPGA timing, performance, and power
- Verify complex FPGA designs using UVM and formal verification
- Debug real-world FPGA design and performance issues
Sample Project Titles:
- Design and Simulation of Digital Controller/CPU
Core/Protocols such as UART, SPI, I2C, AXI4 - Design, Simulation, Implementation and Verification of
Digital Controllers, ALU Cores and protocols such as
UART, SPI, I2C, AXI4 on FPGA Board - SV Verification of Digital Controller/CPU
Core/Protocols such as UART, SPI, I2C, AXI4 - UVM Verification of Digital Controller/CPU
Core/Protocols such as UART, SPI, I2C, AXI4
Tools & Resources:
- Xilinx Vivado Tool
- EDA Playground
Detailed Curriculum:
Project Development – 4 / 6/ 8 weeks
Phase-1: Research, Planning, and Initial Development
Project Scope Definition
Research & Feasibility Study
Initial Planning & Setup
Project Phase-2: Development, Testing, and Refinement
Development & Iteration
Testing and Validation
Refinement & Optimization
Prepare for Final Deliverables
Final Project Demo and Presentation
