VLSI Design & Verification

 

Eligibility:

B.E / B.Tech (ECE, EEE, IT, IS, CSE)

Duration:

15 days to 30 days

VLSI Design & Verification Modules

Design & Implementation of projects on PLD device (FPGA-CLD) with the help of HDL programing language

  • Cryptography Cores / Verification projects (System Verilog, UVM, VMM, OVM Methodologies)
  • Signal Processing, Image Processing & Image Compression
  • Wireless Communication (Base Band Processing)
  • Interfaces (RS232,I2C, SPI)

Application Areas: Wireless Communications Standards - Zigbee, WLAN, Wimax, LTE, Security Systems, Power Electronics, Medical Electronics

Projects Take Away

  • Gain strong subject knowledge and their applications
  • Exposure to have hands-on industry standard tools
  • Ability to present solution for real time complex problem
  • Project learning, Implementation & documentation
  • Hardware* for demonstration
  • Certification which has industry recognition.

*Terms & conditions apply

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